> > > How this works with DOC I am unclear as I had noticed a while back that
> > > there was hardware assisted ECC. This might get in the way of YAFFS ECC
>
> but
>
> > > maybe this can be circumvented.
> >
> > As far as I can tell, the hardware ECC just makes the DOC faster.
>
> Umm. It may use some of the oob data area for its own ECC in a YAFFS
> incompatible way. I am not sure of my ground here, only that you need to
> check it out.
>
> > Also, I think that Microsys has released information about how to use
> > the hardware ECC.
>
> Ok.

Determining, then straightening out, OOB conflicts is essetially what DOC 
support boils down to.

As far as I am aware, the ECC does not actually impact on the NAND and works 
something like as follows.
* As you write bytes to the NAND buffer, an ECC is calculated on the side in 
the ASIC.
* You can then read ASIC registers to determine the ECC.

Essentially you can just ignore the ECC and see raw NAND chips, ie the ECC is 
non-intrusive.

Thus, the current YAFFS page programming would change from something like:

* Calculate ecc. + tags and format up OOB (spare)
* Write data + oob
* Program page

to:

* Write data
* Read ECC from ASIC
* Format up and write oob.
* Program page

Essentially, the hw ecc saves the ecc calcs - that's all.

Christian Gan has implemented a hw ecc scheme which I think is like above in 
YAFFS, so I suspect DOC support might almost be done :-).

-- Charles


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