16/09/2004 16:05:35, "David Bisset" 
<david_bisset@itechnic.co.uk> wrote:

>Not an issue since the CF specification says that *all* CF cards 
must be
>able to work at both 3v and 5v. And I've never seen otherwise.

Super. I'll stop fretting. (I knew that all cards had to enumerate at 
all voltages - wasn't sure about full functionality. Makes me 
wonder why they bother with all the voltage detecting, really...

>I won't bore the list with this but I'll send you photo's (against a 
cm
>grid) of my small collection of CF cards.

Cheers. Of interest is also whether the bulges go up, or down, 
from the main card. It's most likely that the second slot will go 
where the SM socket currently is, on the other side of teh PCB from 
the original slot. If all ulges point upwards, all is well. If the go 
towards the PCB, we're stuffed. 
>>their argument now, to try to convince me?
>
>Sounds like a tough challenge :-)

All things are negotiable - but if nobody cares about hot-swap, 
then it's definitely not getting my time or your (collective) money :)

>and it'll take similar time to write the
>CPLD,

Aaah, the CPLD. Therein hangs a tale. It's likely to be a softloaded 
FPGA this time. More pins, more funtionality, more room for 
bespoke innards, less cost. However, static current is much higher 
(mA, not uA), so it'll need to be powered down for sleep modes, 
and reconfigured on resume. No great hardship. (I wanted to do 
this for Balloon2, but couldn't, since the PLD was needed to mess 
with the reset and power control lines. Things are easier with 
PXA27x, and the FPGA is only now for frippery like NAND, SM, CF 
and the bus interface. (5V signalling on the backplane interface - 
very tricky, and a waste of good bus buffers. Discuss). 

>However if it's likely to be March next year before the first one 
rolls
>out then I'd like to know as early as possible so I can think up 
some
>really good excuses as to why I can't deliver a faster version of 
Hydra
>by next summer....

Sure. 

>Do we now have a definitive delta spec over 2.xx?

No. It's a function of how much I can cram on the board without 
making the PCB or manufacture too difficult - and that's not 
knowable until I'm further along. (Currently playing games to work 
out the GPIO mapping - things are much more flexible (read: 
annoying) than on SA1110. It'll be good when it's done, but, right 
now, I need sleep...)

Steve