On Thursday 18 November 2004 22:27, adam.charrett@philips.com wrote:
> I'm currently try to evaluate whether to use YAFFS for a project on one of
> our chips and having looked at the spec am unsure as to whether YAFFS
> could/does support 16Bit NAND flash.
> The only difference between 8Bit NAND flash adn 16bit as far as YAFFS is
> concerned would be where the Bad Block information is stored and the fact
> that a 2byte word is used instead of 1 byte.
>
> Has any one used YAFFS with a 16bit device?
>
> Are there any plans to support 16bit devices?
>
> Many thanks
>
> Adam

Hi all, 

Sorry to be so late to the party (was away for a short hike last week).

YAFFS will work fine with a 16-bit NAND device (ie. one with a 16-bit bus but 
512byte pages/32 pages per block). These devices use 8 bits for accessing the 
command registers and use 16-bits for pumping the data. 

As Wookey has noted, you need to check the rewrite-happiness because YAFFS1 
needs to be able to write delete flags to the spare when a page gets 
discarded. That, however, is independent of the 16-bit bus issue. YAFFS2 has 
no such constraint.

The bad block marking is no problem at all since YAFFS always reads/writes 
either the data (512bytes) or spare (16 bytes) as a single operation. There 
is no access where YAFFS reads only one byte at a time.

Where theses devices can really pay off is that the wider bus width can move 
the data faster (x16 cycles rather than x8 cycles). Futher, with devices like 
an ARM you can use ldmxx/stmxx to get way better performance.

-- Charles