Thanx Andre This patch essentially changes level 0 tnodes from being 16 bits wide to 32 bits wide. The impacts of doing this are: 1) Negative: Almost doubles the RAM used by the nodes. 2) Positive: Speed up through never having to walk through chunk groups. I have an exercise on my plate at present to do something similar, but with far less ram usage. This is using bitmaps instead of u32s. Therefore I would rather not apply this as a permanent patch, but rather leave this as a "lurking" unsupported optional patch. Background: The tree of tnodes is used to find the chunk (== page of NAND) that fits into a certain place in a file. At level zero (ie the level that points to actual chunks, yaffs uses a U16. If you have more than 2^16 chunks in your system (== 32MB of NAND for 512byte chunks or 128MB for 2kchunks), then yaffs uses the yaffs uses the 16 bits to resolve to a "chunk group" and the actual chunk must be manually searched for. Eg. Let's say you have 512MBytes of 512b NAND, you have 2^20 pages. Each chunk group will consist of 2^(20-16) = 2^4 = 16 chunks. That means to find the chunk you really want needs a search of up to 16 chunks. The patch Andre submits means no searching is required. What I'm currently working on uses variable-size bitmaps to achieve the same thing. Instead of using 32bits, the bitmaps will only use the memory required. Eg. If you need only 18 bits, then the allocation will sized just enough to handle that. This will reduce memory consumption considerably, yet still provide the performance benefits. -- Charles > -----Original Message----- > From: yaffs-bounces@stoneboat.aleph1.co.uk > [mailto:yaffs-bounces@stoneboat.aleph1.co.uk] On Behalf Of > Andre Renaud > Sent: Tuesday, 15 November 2005 10:42 a.m. > To: yaffs@stoneboat.aleph1.co.uk > Subject: [Yaffs] [PATCH] Optional support for larger tnode > structure (speeds up big NAND chips) > > I'm not 100% sure about this patch - it changes the > tnode/level0 structure around a bit to try and lessen the > need for chunkgroups on large cards. > > The patch probably isn't suitable to go straight in, but if > someone has some comments on it, that would be good. > > With this patch our random read speed on 512MB NAND chips > increased from 500kB/s to 710kB/s. > > Thanks, > Andre > -- > Bluewater Systems Ltd - ARM Technology Solutions Centre > > Andre Renaud Bluewater Systems Ltd > Phone: +64 3 3779127 (Aus 1 800 148 751) Level 17, 119 > Armagh St > Fax: +64 3 3779135 PO Box 13889 > Email: arenaud@bluewatersys.com Christchurch > Web: http://www.bluewatersys.com New Zealand >