Hi,
> Do you have your write protect pin tied to a power fail flag or such?
> The way the wp pin works is to disable the internal programming voltage
> generator. The residual charge might be enough to complete a write, but
> is not enough to complete an erase.

First I had it tied to the system reset then (per your recomendation) I
reconnected it to the Vcc. Subjectively it helped a bit but the power 
cycling problems were still there. I also recall seeing "bit flipping" 
phenomenon when a bit would be partially written and then would sometimes 
read as 1 and sometimes as 0.

> If wp is not disabled and the system rails can supply sufficient power
> to the NAND chip to complete the erase (~2 to 3 msec) then things should
> be fine.

I have about 2 ms from reset trip point to when Vcc hits 2.7 V (lowest NAND 
Vcc spec)


Sergei