> Hmm, the yaffs1 compatibulity mode in the yaffs2 source is fine in
> general - many people have been using it for a long time. The error
> message probably means that there is something wrong with the
> data that are being written or read from the OOB so there appear to be
> ecc errors. What sort of ECC are you using? calculated by YAFFS,
> calculated by MTD or done in hardware? YAFFS and MTD need to agree
> with each other, and hardware and any bootloaders that write flash
> images on OOB layout and ECC policy.

Is the YAFFS ECC different from the MTD ECC implementation? I've my 
bootloader write a binary generated by mkyaffsimage into the NAND. When 
I use the YAFFS ECC , everything is fine. When I turn off YAFFS ECC and 
back to MTD ECC, there are loads of complaint about retiring the flash 
block.

Why is the YAFFS and MTD ECC disagreeing with each other? Is hardware 
ECC going to get a different result from YAFFS and MTD?

Terence.