OK, be warned what follows is gutty hardware stuff... However there is a
software/kernel question buried in the midst of it.

After the "problems" with the backup battery, and given I need to finalise
the production PCB last month or earlier. Today was the day for trying to
untangle Battery backup, deep sleep and the RTC...

What everyone would like is for the PXA to retain its Real Time Clock
registers when we pull the power, or when the main battery is flat.

It was naively assumed that we just needed to fit a backup battery to the
appropriate power controller pins and it would all happen.
Needless to say it isn't that simple.

The PXA will retain RTC registers under all circumstances except a hardware
reset or a power on reset.
This means that we must be able to remove all supplies from L3 (except the
backup battery) and reapply them without causing either of these two types
of reset.
These registers are robust against other, lesser resets.
This should work by maintaining the backup battery voltage into the PSU
controller with either a backup battery or alternative source of 3v.
(POR is caused when this backup battery is applied, which will only happen
if is discharges below 2.425v, or is pulled out, and hardware reset is
essentially caused by pressing the button (CPLD needs not to do this by
accident)).

Therefore to maintain the RTC registers we need the PXA to enter "Sleep" or
"Deep Sleep" modes (to reduce the current consumption to a few micro amps
provided by the backup battery), however this must be done by *software*
(not by just pulling the power) and there is a strict sequence to follow.

{We will also need to make sure that all the other bits of the L3 board also
shut down suitably. However this should happen because nearly everything
else is powered from VCC_IO which is turned off when the system goes into
sleep/deep-sleep, but I'm sure there will be things we need to look at.}

So I need to know how to put the PXA into deep sleep. Is this implemented in
the kernel power modes?
Is there a proc interface (too easy....:-)).

So in short we *should* be able to retain the RTC registers with a backup
battery, but only if we deliberately put the PXA into sleep or deep-sleep
*before* removing the power.

We would then need to re-apply the main power and kick the PXA out of sleep
with the "unsuspend" input.

If we don't remove power then that is OK too, and the RTC can be programmed
to wake up suitably, in this case we will be in a very low current mode.

Coming out of Sleep/Deep sleep we will probably need to reboot, and we
certainly will need to reconfigure the FPGA (or reload the CPLD registers).
The PXA manual states that the RAM is in "self-refresh" mode during
Sleep/Deep-sleep however I can't quite square this with the fact that
VCC_MEM has gone away. Possibly a misprint, this is certainly true for
Standby where all the supplies are active.

Current drawn at 5v equiv for the PXA alone is quoted as 20 microA for Deep
and 32microA in Sleep, 340 microA in standby (although everything else is
active in standby so actual consumption is much higher).

Finally can we do voltage scaling?

I will configure the next rev of L3 to work both with the backup battery and
without (may need a link change) but I can't test any of this till we can
sleep the processor from software.

Thoughts, comments welcome.

David Bisset
MD iEndian (formerly Balloonz)

P.S Production currently scheduled for June...