NAND now back at full speed. (measured at about 10 x faster on the 'scope).

NAND_RNB needed a pull up, clearly we are now reading this in the NAND
driver (nand_status(0)).
(Note this is not a "real" resistor but a programmed one inside the FPGA).
The CPLD .ucf file had one but the FPGA .ucf file did not.

I'll check stuff in on Monday now...

Regards

David



 

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