Hello All!

 

I am eagerly waiting here in the USA for the Balloon3 board to come out.  I
have a few questions if you don't mind.

 

1.  What is the expected pricing for 1-2 of these, shipped to the USA?
(FPGA Version)

This is still TBD as we need to get volume production sorted, and decide on
the fit levels for different price points.

 

2.  Which FPGA are you using to populate these?

Xilinx Spartan 3. The P2 Prototype build used the XC3S400 it is planned for
the E1 build to use XC3S1000 as the cost difference is now tiny.

Up to XC3S2000 could be fitted as an option.

 

3.  Are you aware of anyone who has already developed a carrier board that
will hold hold two Balloon3's?

 

I don't think anyone has done this yet but of course you are welcome to
contribute a design for one. I know others are keen to use multiple Balloons
linked together,

how do you see the two boards communicating?

 

4.  What is the current (realistic) timeframe for release?

The E1 build will take place next month this will deliver machines to the
main sponsors of the project Cambridge University Engineering Department,
Toby Churchill Ltd and others, it is possible but not yet decided that some
of these may become available for sale. I would expect an E2 build within
2-3 months of the E1 build (Christmas may delay this till Jan).

 

5.      How are they looking as for as power usage is concerned?  (My
application is in wearable computing...)

They are designed with battery and low power in mind, the CPLD obviously
takes less current than the FPGA and it depends on how many CPU cycles you
are using etc.

I'm reluctant to state numbers simply because we've not optimized things
like standby currents, however so far we've achieved lower current
consumption than Balloon2.

Wearables is certainly a target market so I'd be interested to know your
power budget.

 

I understand there might not be an answer to question 3, but really hope you
can answer the others...

 

Thanks!

 

Dan

Thanks for your interest

 

David Bisset

iTechnic Ltd.