On Wed, Sep 7, 2011 at 2:28 PM, Patrick Doyle wrote: > While not trying to malign anybody, I am curious to learn if it is > possible that the AUX_NIRQ interrupt on the balloon3 board has never > been adequately tested. > Hi Team! Here's my fix. It seems that some time ago the control registers in the FPGA were switched from read/write registers to registers that one sets bits by writing to one address and clears bits by writing to a different address. While the definitions for BALLOON3_INT_CONTROL_SET_REG and BALLOON3_INT_CONTROL_CLR_REG made it into balloon3.h (via balloon3.patch) their use didn't make it into balloon3.c. I have attached a patch file which now lives in my patches/2.6.36.6 directory. I'm not sure what you (the team) thinks is best here -- should it be merged into the balloon3.patch? Should it be submitted back upstream (since ballon3.[ch] are now part of the upstream kernel distribution)? Does anybody upstream still care about 2.6.36.6? Should this change be propagated up and down the different kernel versions that are currently in the balloon3 distribution? CAUTION CAUTION CAUTION When I first applied this patch, my board stopped booting, right after it initialized support for PCMCIA. Since I don't have PCMCIA, the pcmcia status change interrupt was firing repeatedly. I fixed this by modifying my FPGA image to pull that pin up (via a change to my UCF file). I expect I could have just as easily fixed it by disabling PCMCIA support. (In fact, I should probably do that anyway, since the kernel pauses for 6 or 7 seconds just after it enables PCMCIA, and I don't even have the connectors for it on my boards anyway). For better or worse, I also changed BALLOON3_NR_IRQS in balloon.h from (IRQ_BOARD_START + 4) to 3. I'm not sure why the old code added 4, when there are only 3 additional interrupts defined in the FPGA, but I've assumed that was a typo or a holdover from older code. Please review this patch, test it on other boards, kernels, and kernel configurations, and let me know what you think. --wpd