Hello Stefano

My apologies for a late delay. I have been away from my office for the Christmas break.

I looked at the datasheet and I see the following things in the parameter page structure:

* The device supports partial page programming and has 4 partial pages. ie. each page can be treated as 4x512byte sub-page.
* These pages may be programmed individually.

That suggests that this part could be uses in Yaffs1 mode, just with 256 pages of 512 bytes rather than 64 pages of 2k.

However...
* It also says a maximum of 4 programs per page. Since Yaffs1 requires a page be programmed twice: once for programming and once for setting the deletion flag, the above scheme would require 8 programming operations per page.
* It also wants 4 bytes of ECC correction per page. Using Yaffs1 ECC only gives 1 bit per 256 bytes. That is not as good.

Further, elsewhere it recommends only programming pages in sequential order within a block. Yaffs1 requires being able to program in any order to write deletion markers.

Therefore I cannot recommend using Yaffs1 on this part.

If you use one of the parts with built-in ECC like the MT29F1G08ABADAWP then it is very simple to get Yaffs2 working on that part.

Regards

Charles



On Thu, Dec 28, 2017 at 9:40 PM, Bettega Stefano <stefano.bettega@tiscali.it> wrote:
Hello Charles,

I've read the NAND datasheet in deep, ad it seems that I can't use the NAND splitting the page in subchunks to emulate four 512 bytes pages.

As it says (page 15): "NAND Flash memory array is programmed and read using page-based operations and is erased using block-based operations", I think I have to switch to yaffs2 and handle all of its flavors.

Glad to have your opinion about it.

Thanks and regards,

Stefano



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