On Fri, 31 May 2002 20:35, Thomas Gleixner wrote:
> On Friday, 31. May 2002 10:04, Charles Manning wrote:
> > For my continuing education: Which NANDs only support a single page
> > write? All the stuff I've looked at allows at least 3 writes to the page.
>
> I had some offlist discussion with a Samsung engineer. He told me that they
> will restrict consecutive writes to 1 write to page and 2 writes to oob due
> to some modifications in the silicon. They decreased the number of
> consecutives writes from 10 to 4 to 3 and will decrease it to 2. I think
> the preliminary datasheet of the 256MB chip, tells this already.
> He told me further, that data security may be affected by consecutive
> writes even on chips, which allow more consecutive writes. If you have a
> look at the chip structure, it is obvious, that there can be a influence on
> cells. So we decided to do only 1 write to a page and 2 writes to oob. I
> think, you did the same.
>
> The other point is, that you must not do
> write 0xf7 0xaa
> and then
> write 0xf6 0xaa
> This will fail on some chips. We have done a lot of tests, when we
> implemented JFFS2 on top of NAND. You can only do:
> write 0xff 0xaa
> and then
> write 0xf6 0xaa
Thanx Thomas
I have a spare byte in the yaffs OOB area that is designated "status". This
was originally earmarked for the purpose of identifying status, but then I
just changed to stomping the tags.
I will change this back to be used to indicate status.
That will make everyone happy (incl. Samsung's engineers).
-- Charles
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