21/07/2004 14:47:08, Tim Froggatt <
tgf20@cam.ac.uk> wrote:
>A brief introduction... I work for the design group in the
Cambridge
>Engineering Dept,
Sometimes I wonder if this internet thing actually extends outside
Cambridge :)
>The small size isn't required for us, and presumably a larger
board would
>be cheaper,
Not really. there's a natural size for any board. Balloon 2.0x was
rather smaller than its natural size, and was made trickier
because of that. Making boards bigger reduces the possible
number of uses, makes EMC compliance harder, since the
antennas get longer and it's harder to stick a tin can over it, all
sorts of hassles. I suspect that Balloon3 will fit comfortably onto a
Balloon2 footprint, while staying cheap.
> so we'd be keen on that. Is there any possibility of designing
>the board once and then getting a computer to churn out 2 sets
of actual
>board layouts - a small one for those that need it, and a larger
one for
>when cost is an issue? Or is that a bad idea?
It's mostly a bad idea from the "variants are evil" point of view. I'd
definitely prefer not to need to do this, and, for the reasons
above, I suspect we won't need to.
> Does anyone have an idea what the likely impact would be on
the
>board's cost?
It's newer silicon, so should be smaller, cheaper, faster, lower
power, more integrated. t'is the way of things, and I expect this to
be the same. It looks like we'll be riding on the back of 3G
phones, rather than PDAs, this time, though.
Having spent half of today reading data, it does look like a very
fine candidate. (and it's got 4 PWM channels, which I know you
guys were hankering after, and the interface to FPGAs looks
exceptionally convenient)
(By the way, Tim, I can't send you mail directly because of some
overzealous (wrong, even) spam detection at mx.cam.ac.uk)
Steve
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