Re: [Yaffs] Re: YAFFS and HW ECC

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Author: Thomas Gleixner
Date:  
To: Wookey
CC: Roberts Nathan-mcg31137, YAFFS
Subject: Re: [Yaffs] Re: YAFFS and HW ECC
On Thu, 2005-03-17 at 15:16 +0000, Wookey wrote:
> I haven't seen a response to this so here goes. There is the old MTD way of
> doing this and the new. The new way allows arbitrary positioning of the bits
> of info in the OOB as I understand it, which solves your problem. The old
> MTD scheme allows 2 or three different schemes but if your hardware is
> putting in 'completely' the wrong place then yes you areout of luck without
> some hacking.
>
> My understanding is a bit vague. Thomas will no doubt correct me if I'm
> talking rubbish. I'mnot sure when the new scheme came in.


We introduced it along with the support for large page NAND and as a
result of a long discussion with Charles and David.

There is an explanation in the NAND API docs.

In short:

The board driver provides an oob_info structure which contains
information about ECC placement and oob bytes free for fs usage to the
generic nand code.

A fs which wants to write oob data along with the data in the main area
provides a buffer and the nand layer places the bytes into the free byte
positions. On read it picks the bytes from the oob and puts it into the
fs buffer.

The file system can be agnostic of the ECC positions and the areas where
fs information is stored in oob, so situations like yours are not
happening.

tglx