Hi All
The last few weeks have been very busy for me.... setting up various YAFFS
test harnesses and adding integrity code to help YAFFS work on NOR flash.
The "mini-test-farm" is still small, but is growing. I'm setting up a way to
run various automated tests in yaffs1 and yaffs2 modes on simulated flash
(NOR and NAND). At present this runs on an old PC but I hope to soon redeploy
this on a quad core to crank the tests faster.
As well as simulation, the mini-test-farm also runs on a NOR-based board with
real flash (Numonyx (previously Intel) M18). This board is powered via a
microcontroller board that randomly pulls power thus testing power fail
safety.
I will soon be adding a NAND-based board to the test farm.
There is growing interest in running YAFFS on NOR, so it is pleasing to see
YAFFS survive power fail testing on real NOR systems.
The biggest issue with NOR integrity is that the NOR devices program and erase
very slowly meaning that it is highly likely that pages and erases will only
be partially done, leaving a bit-mess on the NAND. This is mitigated by
executing using pre and post markers to make the writes and erases
into "transactions". See direct/yaffs_norif1.c. This code is currently M18
specific but should quite easily migrate to most NOR flashes. I shall be
adding support for other NOR devices soon (when I get the hardware).
I hope to improve NOR speed in the next few weeks by adding erase suspend
support.
If anyone has any particular interest in NOR and would like to discuss, on or
off list, please feel to do so.
Regards
-- CHarles
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