On Thursday 30 April 2009 19:37:57 Stanislav Popov wrote:
> Hi,
>
> Maybe I found the source of the issue.
> I put some delays after evry chunk write in yaffs (my fs in yaffs) and
> it's working fine.
> So the issue comes from timing configuration...
> Where do you think could be the real source of the issue? - driver
> configuration? EMIF configuration? Hardware Issue?
Good to see you're identified a specific issue.
Any of the above.
Something else to consider is caching. If your NAND accesses are being cached
then that will play merry hell with the signals that get to the NAND chips.
Driver and hardware timing are intertwined and it is often not realistic to
say that the hardware is good but the driver is faulty, or vice versa.
I once fixed a lubrication problem in software... but that's a story for
another day!
-- CHarles
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