Re: [Yaffs] yaffs2 ECC algorithm

Thanks for reply!

"use_nand_ecc" is set to 1 and "no_tags_ecc" is set to 0 in /proc/yaffs. Does this path stores configuration setting?
I try to set "use_nand_ecc" to 0 but I can not. How can I change it?


after setting the flages, How can I be sure that ECC works? How can I see what it is doing with data?


And is there any where that I select the mode?(I mounted yaffs2, so I thought that I can just use it!)






________________________________
From: Charles Manning <cdhmanning@gmail.com>
To: yaffs@lists.aleph1.co.uk; S. K. <s.kr713@yahoo.com>
Sent: Monday, May 28, 2012 1:46 AM
Subject: Re: [Yaffs] yaffs2 ECC algorithm

On Saturday 26 May 2012 18:38:11 S. K. wrote:
> Hello everyone!
>
> I have already mounted yaffs2 on my ubuntu12.04 with nand simulator .There
> is something not clear to me. Yaffs2 has ECC algorithm but, Where it will
> apply?

The ECC algorithm is used in different ways depending on configuration
settings.

In yaffs1 mode, the ECC is used if use_nand_ecc is NOT selected.

In yaffs2 mode, the ecc is used to protect the tags if no_tags_ecc is NOT set.


>
> I want to check performance of its ECC algorithm on nand simulator and on
> flash device. can you help me exactly what I have to do?

Without more information it is difficult to advise you.

>
> and another question: I understood that flash memories can be SLC or MLC.
> SLC uses binary algorithms and  MLC uses nonbinary one. Is it correct?

Well all flash cells are really analogue devices - not digitial.

SLC devices store only one bit per cell so they only have one threshold. MLC
devices store multiple bits per cell so have multiple thresholds.



> Is
> it influence the ECC algorithm? If yes what is the yaffs ECC
> algorithm?(Hamming or ...) what kind of flashs does yaffs
> support?(simulator and device)

Since MLC has less margin for error, MLC typically requires more robust ECC.

SLC devices will typically use 1-bit ECC using hamming codes (thats what
yaffs_ecc.c does). MLC will typically use BCH codes.

BCH codes are computationally expensive and will often use hardware in the
NAND controller.

-- Charles