Dear All,
I'm working on embedded system equipped with NAND Flash memory.
The code is pretty old and corresponds to SHA1:
60f5ecebdeee37d56f33374c407376f596baa468
from: git://
www.aleph1.co.uk/yaffs2
From my debugging I do see two bit flips (should be 1s, but I read 0s)
happening in the same chunk of data (0x100), from which ECC is
calculated.
As fair as I know the ECC will be "correct" for two bit flops.
I've looked to the yaffs_ecc.* files and found following comment:
/*
* This code implements the ECC algorithm used in SmartMedia.
*
* The ECC comprises 22 bits of parity information and is stuffed into
3 bytes.
* The two unused bit are set to 1.
* The ECC can correct single bit errors in a 256-byte page of data.
* Thus, two such ECC blocks are used on a 512-byte NAND page.
*
*/
So it seems like two bit flops are not detected - only single bit flop
is detected and corrected.
Is there any way to mitigate this issue?
IMHO the NAND flash page for this data chunk shall be marked as BAD ->
but we cannot detect such errors.
Is there any plan to implement new algorithm?
For example:
https://www.micron.com/~/media/documents/products/technical-note/nand-flash/tn2963_ecc_in_slc_nand.pdf
Best regards,
Lukasz Majewski
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