>Not representing CUED officially, but as an interested party, I note
>that some of the boards at CUED don't like working with their CF
>wireless cards.
Are we talking about Balloon2 or 3?
If Balloon2 then there is a known problem with cards that use the internal
Voltage regulator to generate 3v3 from an incoming 5v. This regulator is not
strong enough to deliver the peaks to many CF WLAN cards during transmit.
However providing 3v3 externally it works fine.
If you are talking about Balloon3 this problem has not been see to date.
I've run CF WLAN successfully (although probably not "flat out") but I've
certainly shifted large files through it.
>If given "serious" traffic, they seem to dissociate from their AP, and
>generally stop working until the board is rebooted. Very light traffic
>doesn't seem to upset them (Although I think one won't work at all).
This would tend to indicate software rather than hardware as the transient
currents will kill the card on any transmit, what might have an influence is
the output power setting which should vary with signal strength.
>My instinct - and the absence of lots of capacitors around the CF
>socket, is that perhaps the voltage supplies to the CF socket aren't
>able to support the large transient currents which could potentially be
>pulled by a wireless card (although I expect there are caps inside the
>WiFi card).
Gone are the days when everything got plastered with "big caps" these days
you can get 10uF in 0603 ceramics which is adequate to mop up transients.
The on-board PSU that feeds the CF card should have adequate current, but I
will note the comment and do some tests as soon as we have E1 up and
running.
>Another issue, one of the boards has a solder blob between two
>components near the rework on the FPGA PSU controller. Another board has
>a component slewed to touch the one next to it in the same place as the
>solder-blob. Looking under a magnifier didn't quite convince me that
>they aren't connected to the same trace anyway, but getting schematics
>and at least top + bottom layer layouts for the various balloon builds
>would be of great assistance in determining if these soldering defects
>are a problem or not.
If you can send me a photo I'll take a look, if it's a manufacturing fault
then it needs to go back to be fixed. Some adjustments to the component
footprints around the FPGA PSU were made at the 3v21 PCB release (Seen at
the E1 build) so you may be looking at a P2 board.
>Regards
>Peter Clifton
David Bisset
_______________________________________________
Balloon mailing list
Balloon@balloonboard.org
http://balloonboard.org/mailman/listinfo/balloon
(text/plain)