+++ Wookey [2009-11-09 15:54 +0000]:
> +++ Chris Jones [2009-11-09 13:25 +0000]:
> > Wookey wrote:
> >> The FPGA variant of balloon has not been getting much attention
> >> recently so it's not much of a surprise that 'latest' build from
> >> balloonboard SVN seems to be broken.
> > > ...
> > >
> >>
> >> Looks loading the image is not in fact not working.
Right, I am back on the case and have done some proddling, the general
summary is that both old (E1-vintage and new (STI-built)) FPGA boards
don't work with current code. In fact you have to go back to v0.3 (Oct
07 for a bootldr+fpga.bin that works).
A modern bootldr fails to load the FPGA bitstream into the device
"Timed out waiting for Done." so it doesn't matter much which flavour
you test. Fortunately this breakage, which of course prevents NAND
access is independent of the kernel so is relatively simple.
We have 3 'current' flavours of bootldr/vhdl code:
HEAD
branches/novlio
branches/novlio-ncs1
I know that HEAD is effectively the vlio version. Brnaches novlio has
that dsiabled. but what is the -nc1 variant for. (It seems to use ncs1
instead of nc4 for nand access, or something like that - I am confused).
It turns out that the novlio branch bootloader can load fpga images
and if you load the novlio fpga image then nand access actually works.
However, judging from boot speed and particularly bad-block
enumeration and yaffs init it is going _very_ slowly.
Copying the magic MSC2_INIT value (in boot-pxa.s) from the novlio
branch into HEAD does not give that version the power to program FPGA
images. (which is a pity- I thought it might).
So, there now seemto be quite a few possible values for MSC2_INIT:
here is the relevant set of comments and values from both branches:
#if defined(CONFIG_MACH_BALLOON)
// configure nCS4 as VLIO
MSC2_INIT:
// this is the value for VLIO - fast timings to be slowed by wait
states inserted by the CPLD
// assume 104MHz memory clock because we can't get the timings we need
for
// Samosa at 208MHz. Note kernel patch (balloon3-cpufreq) which sets
memory
// clock to 104MHz at all CPU clock frequencies.
// (RRR*2)+1 governs nCS deassert time between cycles
// we want it to be as slow as possible so we set it to 7 (130ns-ish)
// (RDN*2) is nOE/nPWE deassert time between cycles (if nCS stays
asserted, which it usually doesn't)
// we want about 120ns so we set it to 7
// RDF is minimum number of clock cycles nOE/nPWE are asserted
// we want this to be 3 for quick NAND access
// any slower cycles will be created by the VLIO timer in CPLD
//.long 0x74a47734
//below is correct magic value for use with 'fast bus' mode - i.e if
//CPU_FREQ turned on in kernel
// .long 0x74a45dd1
//magic number from the novlio branch
// 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
//RBUF| RRR | RDN | RDF |RBW| RT
// for Samosa, asssuming 104MHz bus clock,
// SRAM timing
// RDF=14, RDN=14, RRR=4, RBUF=0, RBW=0, RT=1
.long 0x74a44ee1
#else
MSC2_INIT:
.long 0x74a42494
#endif
I haven't yet resorted to reading the datasheets to work all this out
- I'm hoping someone hardwarey can give me the lowdown.
I grok that we need to have an initial set of timings in bootldr that
will allow FPGA access to write the images. Then the image written
needs to contain matching logic re ncs1/4 vlio/novlio (anything else?)
And the kernel samosa driver needs to match that logic as well.
I'm not sure if the HEAD fpga VHDL simply doesn't match the CPLD VHDL
or if all that needs to be fixed is the bootldr init. Clearly that
needs to be fixed first.
All of these fun-and games are compounded by the fact that openocd does
not work on E1-vintage FPGA boards and I've failed to get the Xilinx
tools to run on linux/AMD64. I'll get back to those issues once this
basic nand-access stuff is sorted.
I notice whilst doing this testing that there have been tens of
changes to bootldr, many of them incompatible, and no-one has changed
even the 4th part of the version number since 2006. OK, I didn't do it
either, so blame shared all round, but we all need to be a bit less
crap. The above 3 branches now all have separate 'VERSION_SPECIAL'
suffixes so you can tell what you are running, and I've bumped the
branch versions to 3.0.1 and head to 3.1.0. That should reduce the
current confusion until some merging occurs.
Wookey
--
Principal hats: iEndian - Balloonboard - Toby Churchill - Emdebian
http://wookware.org/
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