Re: [Balloon] Balloon 3 FPGA code?

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Author: Chris Jones
Date:  
To: Peter Clifton
CC: balloon
Subject: Re: [Balloon] Balloon 3 FPGA code?
Peter Clifton wrote:
> On Thu, 2008-01-24 at 15:50 +0000, Chris Jones wrote:
>> David Bisset is the expert on the current expansion boards, but as far
>> as I am aware Ethernet controllers and so on live on the system bus. A
>> little address decoding should allow your application to live on the
>> bus, too.
>
> The application required uncommitted IO lines to be driven as PWM
> signals, although I guess since the system bus will be lots faster than
> my PWM signals, some addressable latch register could probably do what I
> need. The only thing to check, was that I could ensure I got reasonable
> latency on the bus.


The finest way to get your PWM signals via the bus would be to put the
PWM-generation logic in a CPLD hanging off the bus, in much the same way
as the Balloon board's FPGA/CPLD hangs off the bus already, thus
avoiding such frequent (and real-time-critical) bus accesses. The only
reason to do this would be if the Samosa connector didn't have enough
wires on it to carry your PWM outputs, I guess.

> The PWM signals are to be generated from the FPGA, so it all sounds a
> little dodgy though... presumably the CPU is "master" of the bus
> normally?


Yes. As far as I know there's no mechanism other than DMA for anything
else to take control of the bus.

Chris

--
Chris Jones -
Martin-Jones Technology Ltd, makers of Solidlights
148 Catharine Street, Cambridge, CB1 3AR, UK
Phone +44 (0) 1223 655611 Fax +44 (0) 870 112 3908
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