Re: [Balloon] Balloon 3 FPGA code?

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Author: Peter Clifton
Date:  
To: Chris Jones
CC: balloon
Subject: Re: [Balloon] Balloon 3 FPGA code?

On Fri, 2008-01-25 at 14:45 +0000, Chris Jones wrote:

> The finest way to get your PWM signals via the bus would be to put the
> PWM-generation logic in a CPLD hanging off the bus, in much the same way
> as the Balloon board's FPGA/CPLD hangs off the bus already, thus
> avoiding such frequent (and real-time-critical) bus accesses. The only
> reason to do this would be if the Samosa connector didn't have enough
> wires on it to carry your PWM outputs, I guess.


I'm not too familiar with CPLD devices, and how capable they are, so at
the moment am favouring FPGAs.

The Balloon as a platform was that I could use its inbuilt FPGA, and we
would move away from bespoke FPGA designs. We don't have the facilities
to solder BGA, and even the 208 pin Spartan 2 chips which we've been
using are a bit of a pain to solder.

I'm happy enough with that kind of pitch if it were required on the
daughter-board.

Is there a netlist for the Balloon available in a machine-readable
format, so I might more easily verify that any back-plane signal I might
want to re-use isn't also tied to other functionality?

Thanks for your help,

Best wishes,

--
Peter Clifton

Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA

Tel: +44 (0)7729 980173 - (No signal in the lab!)